core2duotemp.c to core2duotemp.pas

[hathor]

cpu.h ? - OK - here it is...

Delphi-Quellcode:

/*-
 * Copyright (c) 2006 Stanislav Sedov <[e-mail]>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $MBSDlabs: devcpu/cpu/cpu.h,v 1.4 2006/12/08 22:32:35 stas Exp $
 *
 */

#ifndef _CPU_H_
#define _CPU_H_

typedef struct {
   int      msr;   /* MSR to read */
   uint64_t   data;
} cpu_msr_args_t;

typedef struct {
   int      level; /* CPUID level */
   uint32_t   data[4];
} cpu_cpuid_args_t;

typedef struct {
   void   *data;
   size_t   size;
} cpu_update_args_t;

#define CPU_RDMSR   _IOWR('c', 1, cpu_msr_args_t)
#define CPU_WRMSR   _IOWR('c', 2, cpu_msr_args_t)
#define CPU_CPUID   _IOWR('c', 3, cpu_cpuid_args_t)
#define CPU_UPDATE   _IOWR('c', 4, cpu_update_args_t)

#define INTEL_VENDOR_ID   "GenuineIntel"
#define AMD_VENDOR_ID   "AuthenticAMD"

#define MSR_K8_UCODE_UPDATE 0xc0010020

#endif /* _CPU_H_ */